VRGY Verigy Ltd. (MM)

Verigy Ltd. (NASDAQ:VRGY) today announced that it is extending its joint development work with Cadence Design Systems (NASDAQ:CDNS) to optimize interoperability between Verigy's V93000 SOC test system and the Cadence(R) Encounter(R) Test family of products to improve time-to-yield. The project seeks to enable more efficient volume diagnostics with these systems by combining the power of the scalable, per-pin architecture and capabilities of the V93000 and the Cadence Encounter Diagnostics product for data collection, storage and analysis for large complex devices. This joint project will allow large quantities of failure data to be efficiently brought from the V93000 in a secure format for both batch and real-time analysis by the Encounter diagnostic tool. The results of the collaboration will be available to current and future customers of V93000 Pin Scale systems also using Cadence Encounter Test to improve time-to-yield. The Verigy and Cadence teams are also exploring real-time and low-overhead adjustments to the test and diagnostics flow for multi-site testing. Their goal is to obtain the best possible diagnostic data for yield enhancement. "Time-to-yield is of critical importance for the entire semiconductor industry," said Pascal Ronde, Verigy vice president of sales, service and support. "Successful solutions for fastest yield ramp have to bring together the expertise of ATE and EDA companies. This collaboration will allow our joint customers to achieve higher return on their investment in test in high-volume manufacturing environments through more efficient yield diagnostics flow." "This level of collaboration between ATE and diagnostics is unprecedented and will shorten detection time to the source of yield loss for Cadence and Verigy customers," said Sanjiv Taneja, vice president of R&D for Encounter Test at Cadence. "Tackling these issues shows the strong commitment both Cadence and Verigy have to optimize the test and diagnostics flow to help mutual customers achieve faster yield ramp." This collaboration builds on last year's joint project, in which the two companies validated a test and diagnostic flow between electronic design automation (EDA) and automated test equipment (ATE). Forward-Looking Statements This news release contains forward-looking statements that involve risks and uncertainties, including statements regarding the development, features and functionality of the products to be jointly developed by Verigy and Cadence Design Systems. These forward-looking statements are based on current information and estimates, and are not guarantees of future performance or events. These forward-looking statements are subject to a number of risks and uncertainties that could cause actual events to differ materially from those in the forward-looking statements. The risks and uncertainties include, but are not limited to, our ability to successfully jointly develop the new and complex products contemplated by our relationship with Cadence, the compatibility of such products with our products and uncertainties as to the marketability of such products if and when they become available. Additional factors that may cause events to differ materially from those in the forward-looking statements are discussed in our registration statement on Form S-1, filed with and declared effective by the SEC on June 12, 2006. Verigy undertakes no duty to update the forward-looking statements herein. About Verigy Verigy designs, develops, manufactures and sells advanced test systems and solutions for the semiconductor industry. Verigy comprises the semiconductor test business recently separated from Agilent Technologies. The company began doing business as Verigy on June 1, and completed its initial public offering on June 12, 2006. Information about Verigy can be found at www.verigy.com.