Freescale Semiconductor (NYSE:FSL) (NYSE:FSL.B) has introduced the Open QUICC Engine(TM) developer program for third-party developers and customers who want to optimize the communications functionality of applications that leverage Freescale's QUICC Engine technology. The program is designed to enable developers to customize Freescale microcode that runs on QUICC Engine technology to support a wide range of industry-standard communications interfaces and protocols. QUICC Engine technology is Freescale's next-generation communications engine designed to offload bandwidth-intensive processing tasks from a control-plane CPU, such as a PowerPC(R) core contained in a PowerQUICC(TM) processor, or from a DSP. Introduced in the MPC8360E PowerQUICC II Pro processor family and extensible to other Freescale processor architectures, QUICC Engine technology supports a wide range of communications protocols and functions through microcode. These include Layer 1 physical interfaces; Layer 2 termination, forwarding and interworking; Layer 3 interworking and forwarding; Layer 4 identification and forwarding; IP/Ethernet and ATM traffic management; and quality of service. "The Open QUICC Engine program gives developers the freedom to customize general-purpose Freescale microcode and create application-targeted microcode solutions for specific customer needs," said Lynelle McKay, vice president and general manager of Freescale's Digital Systems Division. "The program is designed to unlock the application possibilities of QUICC Engine technology. It enables third-party developers and customers to implement new communications processing functions in microcode without having to add ASIC or FPGA devices to their applications." A key part of Freescale's enablement ecosystem for PowerQUICC architecture, the Open QUICC Engine program is available to developers through a license agreement with Freescale. Initial members of the program include Arabella Software, DoGav Systems, IndusRAD Inc. and Wipro Technologies. Freescale also invites customers to contact the Open QUICC Engine program team to discuss opportunities for early adopter engagement. "Freescale's Open QUICC Engine technology program enables us to develop application-specific microcode solutions that will help us reach new customers and work closely with Freescale to expand our customer base in the communications and networking, voice over IP systems, embedded controls systems and consumer/SOHO networking markets," said Ravi Rao, vice president of marketing and strategic alliances at IndusRAD Inc. "The developer program gives us the training, tools and support we need to innovate within the technically challenging framework of customizing QUICC engine microcode." "The Open QUICC Engine program is pioneering a new trend for communications processors: the ability to customize industry-standard microcode for new and emerging applications," said P. Subrahmanyam, senior vice president of broadband at Wipro Technologies. "We applaud Freescale for providing this much-needed enablement program for the communications market. The program will enable Wipro to leverage our expertise and technical resources to quickly develop application-specific microcode for Freescale customers." Developers who join the Open QUICC Engine program receive extensive training, documentation and access to CodeWarrior(R) programming tools. Open QUICC Engine tools enable software engineers to manipulate and optimize QUICC Engine communication interfaces to add new functionality to PowerQUICC processor-based applications. This flexible architecture makes QUICC Engine technology suitable for a wide range of applications, such as industrial control, consumer/SOHO networking, broadband access, enterprise networking, wireless and wireline infrastructure, and VoIP systems. Customized microcode developed through the Open QUICC Engine technology program will be portable and scalable across QUICC Engine technology-based processor platforms and applications. The microcode also will be compatible with major operating systems, such as the Linux OS, Integrity OS from Green Hills Software and VxWorks RTOS from Wind River Systems. For more details about the Open QUICC Engine program, visit www.freescale.com/quiccengine. About QUICC Engine technology Freescale's QUICC Engine technology is a scalable, programmable RISC-based communications protocol acceleration engine designed for next-generation wireline and wireless access applications. QUICC Engine technology delivers the packet throughput, interworking capabilities (without CPU intervention), multi-protocol support, high-channel density and software compatibility required to develop advanced, economical solutions for converged packet networks. Based on Freescale's SoC methodology, QUICC Engine technology used in MPC8360E processors features two RISC cores, each running at up to 500MHz. This advanced architecture supports a combined full-duplex data throughput of up to 1.2Gbps interworking. Eight Unified Communication Controllers (UCCs) support Gigabit Ethernet, HDLC, and UTOPIA/Packet over SONET (POS) at up to OC-12 speeds. About Freescale Semiconductor Freescale Semiconductor Inc. (NYSE:FSL) (NYSE:FSL.B) is a global leader in the design and manufacture of embedded semiconductors for the automotive, consumer, industrial, networking and wireless markets. Freescale became a publicly traded company in July 2004 after more than 50 years as part of Motorola Inc. The company is based in Austin, Texas, and has design, research and development, manufacturing or sales operations in more than 30 countries. Freescale, a member of the S&P 500(R), is one of the world's largest semiconductor companies with 2005 sales of $5.8 billion (USD). www.freescale.com Reader Inquiry Response: Freescale Semiconductor P.O. Box 17927 Denver, CO 80217 USA Freescale(TM) and the Freescale logo are trademarks of Freescale Semiconductor Inc. All other product or service names are the property of their respective owners. The "PowerPC" name is a trademark of IBM Corp. and used under license. (C) Freescale Semiconductor Inc. 2006.
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